Speech Signal Processing Implementation for Hearing Impairment Based on FPGA
Hearing impairment refers to an individual?s ineptitude to hear sounds properly and can be partially made up for through hearing aids. However, existing hearing aids face challenges in the implementation of signal processing techniques properly, thus not being able to extract/produce enough speech i
2025-06-28 16:29:37 - Adil Khan
Speech Signal Processing Implementation for Hearing Impairment Based on FPGA
Project Area of Specialization Biomedical EngineeringProject SummaryHearing impairment refers to an individual’s ineptitude to hear sounds properly and can be partially made up for through hearing aids. However, existing hearing aids face challenges in the implementation of signal processing techniques properly, thus not being able to extract/produce enough speech information for the optimum performance.
In this project, we intend to design and implement the signal processing aspect of a digital hearing aid. Sound from environment will be discretized first and then, using digital filter banks, split into different frequency bands. The number and width of each band will depend upon the type of hearing impairment. The objective would be to match the output of the developed filter bank to the available audiograms.
Phase I of the project would base on designing and implementing digital filter banks in MATLAB software and to test setting the amplitudes of different bands according to the available audiograms, such that the error between the two is minimized. Phase II of the project would comprise of an FPGA realization of the finalized design, where we will focus on amplifying the weaker sounds more than the intense ones.
It is expected that our finalized design will provide an improved sound recognition to the hearing disorder.
Project Objectives- To design and implement filter bank techniques in MATLAB software.
- To select the filter bank technique which gives results closest to the available audiograms.
- To implement the chosen filter bank technique on FPGA.
The digital filter banks are designed and implemented in MATLAB software and the amplitudes of different bands are set according to the available audiograms, such that the error between the two is minimized. That is, splitting the input speech signal into its constituent bands and then adjusting the gain for these individual bands separately, as per requirement. Minimizing the error would require testing different filter banks in terms of number and width of bands, structure chosen of filter bank, and to control the gains of different bands in an optimized manner. The filter bank which gives results closest to the available audiograms is then selected.
Then comes the FPGA realization of the finalized design, where we will focus on amplifying the weaker sounds more than the intense ones.
Benefits of the Project- The proposed design will make the external sound environment audible to the hearing impaired individuals.
- The hearing aid could be customized if the patient’s degree of loss increases over time.
- Use of filter banks allows the amplification of only the required frequencies rather than amplifying the unwanted frequencies as well.
The final output would be an FPGA based digital hearing aid which uses digital filter banks to split the audio signal into a desired number of bands, depending upon the patient's degree of loss, and amplify these individual bands as per requirement. The output audio signal would be closely matching the available (patient's) audiogram, with minimum possible error.
NOTE:
The project is focused on the implementation of advanced speech signal processing for hearing impairment and not on developing a hearing aid in product form. Hence, the purpose of FPGA realization is to test the design in hardware.
Final Deliverable of the Project HW/SW integrated systemCore Industry MedicalOther Industries Health Core Technology OthersOther TechnologiesSustainable Development Goals Good Health and Well-Being for PeopleRequired Resources| Item Name | Type | No. of Units | Per Unit Cost (in Rs) | Total (in Rs) |
|---|---|---|---|---|
| Total in (Rs) | 65000 | |||
| Virtex 4 FPGA board | Equipment | 1 | 65000 | 65000 |