Implementation of level shifted MCPWM techniques and OCFT open circuit fault tolerance capability in multilevel inverters

 The emergence of multilevel inverters (MLI) has increased since the last decade. They are suitable for high voltage and high power applications, due to their ability to synthesize waveforms with a better harmonic spectrum. Numerous topologies have been introduced and widely studied, for utilit

Project Title

Implementation of level shifted MCPWM techniques and OCFT open circuit fault tolerance capability in multilevel inverters

Project Area of Specialization

Electrical/Electronic Engineering

Project Summary

 The emergence of multilevel inverters (MLI) has increased since the last decade. They are suitable for high voltage and high power applications, due to their ability to synthesize waveforms with a better harmonic spectrum. Numerous topologies have been introduced and widely studied, for utility and drive applications. Multi-level inverters are commonly modulated, by using multicarrier pulse width modulation techniques, such as phase-shifted multicarrier modulation, and level-shifted multicarrier modulation. Amongst these, the level-shifted multicarrier modulation technique produces the best harmonic performance. This work studies a multilevel inverter with equal DC sources, using the level shifting MCPWM technique. By applying this concept, harmonics can be eliminated, and in the output voltage, the Total Harmonic Distortion (THD) can be improved. A procedure to achieve the appropriate level shifting is presented in this paper.

In many sensitive industrial applications, reliability of multilevel inverters is one of the main concerns. In conventional multilevel inverters, abnormal conditions occur when a fault takes place in one of the switches. This causes serious damages to other equipment. Under these circumstances, the faulty inverter should be eliminated. In this paper, an efficient topology with fault-tolerant capability is presented. In the proposed structure, if an open-circuit fault takes place in one of the switches, the proposed topology clears the fault based on the proposed switching strategy. Moreover, for decreasing total harmonic distortion (THD), the extended form of the proposed structure is presented. Accordingly, by increasing the output voltage levels, the fault-tolerant strategy is valid and a successful fault clearance is adopted on the switches. The operation of the proposed multilevel inverter and the proposed fault-tolerant strategy are verified through adequate experimental and simulation results performed on a 7-level prototype. The fundamental frequency-switching method is applied to the proposed topology to trigger the power switches for controlling the voltage levels generated on the output. Verification of the analytical results is performed using MATLAB/SIMULINK software.

Project Objectives

• Best harmonic performance
• To improve total harmonic distortion
• To achieve appropriate level shifting
• Reliability of multilevel inverter
• Eliminating the need of replacing multilevel inverter
• Introducing switching strategy in multilevel inverter during fault conditions
• Fundamental frequency switching
• Fault tolerant
• Best harmonic performance
• To improve total harmonic distortion
• To achieve appropriate level shifting
• Reliability of multilevel inverter
• Eliminating the need of replacing multilevel inverter
• Introducing switching strategy in multilevel inverter during fault conditions
• Fundamental frequency switching
• Fault tolerant strategy

Project Implementation Method

• Motor drives
• Active filters
• Electric vehicle drives
• Dc power source utilization
• Power factor compensator
• Back to back frequency link systems
• Interfacing with renewable energy resources 
• Static var compensation
• Variable speed motor drives
• High voltage system interconnections
• High voltage DC and AC transmission lines

Benefits of the Project

• Common Mode Voltage: The multilevel inverters produce common-mode voltage, reducing the stress of the motor and don't damage the motor.
• Input Current: ...
• Switching Frequency: ...
• Reduced harmonic distortion:
• open circuit fault tolerance capability
• reliability of multilevel inverter

Technical Details of Final Deliverable

This paper presents a control technique to the multilevel cascaded inverter so that its harmonic content is reduced and hence voltage is effectively used. Level shifting is a well-established emerging modulation and control technique that has been designed and discussed.

The cascaded inverter with individual single DC sources (SDCS) is preferred.

The proposed structure is able to tolerate the open circuit fault in the switches which operate under normal condition. In order to achieve this goal, modulation scheme must be updated and individual switching strategy should be adopted at the time of fault occurrence. For the proposed 7-level structure, switching strategy for tolerating the open circuit fault in the implicit switches.

The faults in the switches are categorized into two cases:

Fault in the switches of level generation unit

Fault in the switches of H-bridge unit

Here the number of the power-electronics components such as switches, capacitors, diodes, and dc sources with fault tolerant capability are investigated.

Final Deliverable of the Project

Hardware System

Core Industry

Education

Other Industries

Energy

Core Technology

Shared Economy

Other Technologies

Others

Sustainable Development Goals

Responsible Consumption and Production

Required Resources

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