Cryptographic Processor Design
Crypto processors are specialized processors that execute cryptographic algorithms within the hardware. The idea of a cryptographic processor is not new. However, with the development of new and improved technologies attackers have found ways to make our systems vulnerable to different cyberattacks
Project Title
Cryptographic Processor Design
Project Area of Specialization
Project Summary
Crypto processors are specialized processors that execute cryptographic algorithms within the hardware. The idea of a cryptographic processor is not new. However, with the development of new and improved technologies attackers have found ways to make our systems vulnerable to different cyberattacks most importantly using power attacks. In this project our focus will be to develop a secured system design capable of resisting against Differential Power Attacks (DPA).
Project Objectives
- To design a secured hardware safe from any type of external intrusions and private information interception.
- To apply safe encryption on our data and instructions to save them from differential power attacks and possible side- channel attacks.
- To shield information present in the inner layers of the processor from revealing any secret information.
- To achieve fast execution of encryption algorithms while still keeping the cost of construction minimum.
Project Implementation Method
This project will be implemented using open soure Swerv-EH2 riscv core. The core will be integrated with the AES cryptographic unit which will be protected against side channel attacks using threshold implemetation. A project demonstration will be prepared using Fpga board.
Benefits of the Project
- Secured hardware from side channel attacks.
- Safe data encryption for private militiary grade technologies.
- Protection from leaking any information processesed in the hidden layers of processor in form of electric signals.
Technical Details of Final Deliverable
A FPGA based implementation of cryptographic processor tested against different hardware attacks. The processor will ensure safe data encryption and display secured key transmission while encountering different differential power attacks.
Final Deliverable of the Project
Core Industry
Other Industries
Core Technology
Other Technologies
Sustainable Development Goals
Required Resources
| Item Name | Type | No. of Units | Per Unit Cost (in Rs) | Total (in Rs) |
|---|---|---|---|---|
| Digilent Nexys A7-100T: FPGA trainer board | Equipment | 1 | 70000 | 70000 |
| Total in (Rs) | 70000 |
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